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mdbx: avoid memory-model from variables for C11 atomics (workaround for lcc 1.26).
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c082eb7d8a
commit
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11
src/core.c
11
src/core.c
@ -877,6 +877,7 @@ size_t __hot mdbx_e2k_strnlen_bug_workaround(const char *s, size_t maxlen) {
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/*------------------------------------------------------------------------------
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* safe read/write volatile 64-bit fields on 32-bit architectures. */
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#ifndef atomic_store64
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MDBX_MAYBE_UNUSED static __always_inline uint64_t
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atomic_store64(MDBX_atomic_uint64_t *p, const uint64_t value,
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enum MDBX_memory_order order) {
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@ -900,7 +901,9 @@ atomic_store64(MDBX_atomic_uint64_t *p, const uint64_t value,
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#endif /* !MDBX_64BIT_ATOMIC */
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return value;
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}
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#endif /* atomic_store64 */
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#ifndef atomic_load64
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MDBX_MAYBE_UNUSED static
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#if MDBX_64BIT_ATOMIC
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__always_inline
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@ -940,6 +943,7 @@ MDBX_MAYBE_UNUSED static
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}
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#endif /* !MDBX_64BIT_ATOMIC */
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}
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#endif /* atomic_load64 */
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static __always_inline void atomic_yield(void) {
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#if defined(_WIN32) || defined(_WIN64)
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@ -1062,6 +1066,12 @@ static __always_inline uint64_t safe64_txnid_next(uint64_t txnid) {
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return txnid;
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}
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#if defined(MDBX_HAVE_C11ATOMICS) && defined(__LCC__)
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#define safe64_reset(p, single_writer) \
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atomic_store64(p, UINT64_MAX, \
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(single_writer) ? mo_AcquireRelease \
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: mo_SequentialConsistency)
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#else
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static __always_inline void safe64_reset(MDBX_atomic_uint64_t *p,
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bool single_writer) {
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#if !MDBX_64BIT_CAS
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@ -1089,6 +1099,7 @@ static __always_inline void safe64_reset(MDBX_atomic_uint64_t *p,
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assert(p->weak >= SAFE64_INVALID_THRESHOLD);
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mdbx_jitter4testing(true);
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}
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#endif /* LCC && MDBX_HAVE_C11ATOMICS */
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static __always_inline bool safe64_reset_compare(MDBX_atomic_uint64_t *p,
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txnid_t compare) {
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@ -261,49 +261,54 @@ typedef union {
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#define MDBX_c11a_rw(type, ptr) (&(ptr)->c11a)
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#endif /* Crutches for C11 atomic compiler's bugs */
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static __always_inline memory_order mo_c11_store(enum MDBX_memory_order fence) {
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switch (fence) {
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default:
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assert(false);
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__unreachable();
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case mo_Relaxed:
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return memory_order_relaxed;
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case mo_AcquireRelease:
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return memory_order_release;
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case mo_SequentialConsistency:
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return memory_order_seq_cst;
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}
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}
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#define mo_c11_store(fence) \
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(((fence) == mo_Relaxed) ? memory_order_relaxed \
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: ((fence) == mo_AcquireRelease) ? memory_order_release \
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: memory_order_seq_cst)
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#define mo_c11_load(fence) \
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(((fence) == mo_Relaxed) ? memory_order_relaxed \
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: ((fence) == mo_AcquireRelease) ? memory_order_acquire \
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: memory_order_seq_cst)
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static __always_inline memory_order mo_c11_load(enum MDBX_memory_order fence) {
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switch (fence) {
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default:
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assert(false);
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__unreachable();
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case mo_Relaxed:
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return memory_order_relaxed;
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case mo_AcquireRelease:
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return memory_order_acquire;
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case mo_SequentialConsistency:
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return memory_order_seq_cst;
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}
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}
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#endif /* MDBX_HAVE_C11ATOMICS */
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#ifndef __cplusplus
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MDBX_MAYBE_UNUSED static __always_inline void
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mdbx_memory_fence(enum MDBX_memory_order order, bool write) {
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#ifdef MDBX_HAVE_C11ATOMICS
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atomic_thread_fence(write ? mo_c11_store(order) : mo_c11_load(order));
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#else /* MDBX_HAVE_C11ATOMICS */
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mdbx_compiler_barrier();
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if (write &&
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order > (MDBX_CPU_WRITEBACK_INCOHERENT ? mo_Relaxed : mo_AcquireRelease))
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mdbx_memory_barrier();
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#define mdbx_memory_fence(order, write) \
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atomic_thread_fence((write) ? mo_c11_store(order) : mo_c11_load(order))
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#else /* MDBX_HAVE_C11ATOMICS */
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#define mdbx_memory_fence(order, write) \
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do { \
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mdbx_compiler_barrier(); \
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if (write && order > (MDBX_CPU_WRITEBACK_INCOHERENT ? mo_Relaxed \
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: mo_AcquireRelease)) \
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mdbx_memory_barrier(); \
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} while (0)
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#endif /* MDBX_HAVE_C11ATOMICS */
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}
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#if defined(MDBX_HAVE_C11ATOMICS) && defined(__LCC__)
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#define atomic_store32(p, value, order) \
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({ \
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const uint32_t value_to_store = (value); \
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atomic_store_explicit(MDBX_c11a_rw(uint32_t, p), value_to_store, \
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mo_c11_store(order)); \
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value_to_store; \
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})
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#define atomic_load32(p, order) \
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atomic_load_explicit(MDBX_c11a_ro(uint32_t, p), mo_c11_load(order))
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#define atomic_store64(p, value, order) \
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({ \
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const uint64_t value_to_store = (value); \
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atomic_store_explicit(MDBX_c11a_rw(uint64_t, p), value_to_store, \
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mo_c11_store(order)); \
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value_to_store; \
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})
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#define atomic_load64(p, order) \
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atomic_load_explicit(MDBX_c11a_ro(uint64_t, p), mo_c11_load(order))
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#endif /* LCC && MDBX_HAVE_C11ATOMICS */
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#ifndef atomic_store32
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MDBX_MAYBE_UNUSED static __always_inline uint32_t
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atomic_store32(MDBX_atomic_uint32_t *p, const uint32_t value,
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enum MDBX_memory_order order) {
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@ -319,7 +324,9 @@ atomic_store32(MDBX_atomic_uint32_t *p, const uint32_t value,
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#endif /* MDBX_HAVE_C11ATOMICS */
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return value;
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}
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#endif /* atomic_store32 */
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#ifndef atomic_load32
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MDBX_MAYBE_UNUSED static __always_inline uint32_t
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atomic_load32(const MDBX_atomic_uint32_t *p, enum MDBX_memory_order order) {
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STATIC_ASSERT(sizeof(MDBX_atomic_uint32_t) == 4);
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@ -334,6 +341,7 @@ atomic_load32(const MDBX_atomic_uint32_t *p, enum MDBX_memory_order order) {
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return value;
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#endif /* MDBX_HAVE_C11ATOMICS */
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}
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#endif /* atomic_load32 */
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#endif /* !__cplusplus */
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