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mdbx: clarify/rework invalidate_mmap_noncoherent_cache() for MIPS.

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Change-Id: I70c279c2ba67191c7cb93cd8875082eb9c8e58b7
This commit is contained in:
Leonid Yuriev 2019-07-20 16:10:15 +03:00
parent cc75679214
commit f39044124e
2 changed files with 38 additions and 15 deletions
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16
src/mdbx.c
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@ -4639,6 +4639,9 @@ static int mdbx_page_flush(MDBX_txn *txn, pgno_t keep) {
mdbx_debug("Write error: %s", mdbx_strerror(rc)); mdbx_debug("Write error: %s", mdbx_strerror(rc));
return rc; return rc;
} }
#if MDBX_CPU_CACHE_MMAP_NONCOHERENT == 1
mdbx_invalidate_mmap_noncoherent_cache(env->me_map + wpos, wsize);
#endif
n = 0; n = 0;
} }
if (i > pagecount) if (i > pagecount)
@ -4654,7 +4657,13 @@ static int mdbx_page_flush(MDBX_txn *txn, pgno_t keep) {
n++; n++;
} }
mdbx_invalidate_cache(env->me_map, pgno2bytes(env, txn->mt_next_pgno)); #if MDBX_CPU_CACHE_MMAP_NONCOHERENT > 1
/* Linux kernels older than version 2.6.11 ignore the addr and nbytes
* arguments, making this function fairly expensive. Therefore, the whole
* cache is always flushed. */
mdbx_invalidate_mmap_noncoherent_cache(env->me_map,
pgno2bytes(env, txn->mt_next_pgno));
#endif
for (i = keep; ++i <= pagecount;) { for (i = keep; ++i <= pagecount;) {
dp = dl[i].ptr; dp = dl[i].ptr;
@ -5524,7 +5533,7 @@ static int mdbx_sync_locked(MDBX_env *env, unsigned flags,
(uint8_t *)target - env->me_map); (uint8_t *)target - env->me_map);
goto fail; goto fail;
} }
mdbx_invalidate_cache(target, sizeof(MDBX_meta)); mdbx_invalidate_mmap_noncoherent_cache(target, sizeof(MDBX_meta));
} }
/* LY: step#3 - sync meta-pages. */ /* LY: step#3 - sync meta-pages. */
@ -6269,7 +6278,8 @@ static int __cold mdbx_setup_dxb(MDBX_env *env, const int lck_rc) {
if (err) if (err)
return err; return err;
mdbx_invalidate_cache(env->me_map, pgno2bytes(env, NUM_METAS)); mdbx_invalidate_mmap_noncoherent_cache(env->me_map,
pgno2bytes(env, NUM_METAS));
mdbx_ensure(env, undo_txnid == mdbx_meta_txnid_fluid(env, head)); mdbx_ensure(env, undo_txnid == mdbx_meta_txnid_fluid(env, head));
mdbx_ensure(env, 0 == mdbx_meta_eq_mask(env)); mdbx_ensure(env, 0 == mdbx_meta_eq_mask(env));
continue; continue;

37
src/osal.h
View File

@ -407,28 +407,41 @@ static __inline void mdbx_memory_barrier(void) {
#define mdbx_coherent_barrier() mdbx_memory_barrier() #define mdbx_coherent_barrier() mdbx_memory_barrier()
#endif #endif
#if defined(__mips) || defined(__mips__) || defined(__mips64) || \ #if __has_include(<sys/cachectl.h>)
defined(__mips64) || defined(_M_MRX000) || defined(_MIPS_) #include <sys/cachectl.h>
/* Only MIPS has explicit cache control */ #elif defined(__mips) || defined(__mips__) || defined(__mips64) || \
defined(__mips64__) || defined(_M_MRX000) || defined(_MIPS_) || \
defined(__MWERKS__) || defined(__sgi)
/* MIPS should have explicit cache control */
#include <sys/cachectl.h> #include <sys/cachectl.h>
#endif #endif
static __inline void mdbx_invalidate_cache(void *addr, size_t nbytes) { #ifndef MDBX_CPU_CACHE_MMAP_NONCOHERENT
mdbx_coherent_barrier();
#if defined(__mips) || defined(__mips__) || defined(__mips64) || \ #if defined(__mips) || defined(__mips__) || defined(__mips64) || \
defined(__mips64) || defined(_M_MRX000) || defined(_MIPS_) defined(__mips64__) || defined(_M_MRX000) || defined(_MIPS_) || \
#if defined(DCACHE) defined(__MWERKS__) || defined(__sgi)
/* MIPS has cache coherency issues. */
#define MDBX_CPU_CACHE_MMAP_NONCOHERENT 1
#else
/* LY: assume no relevant mmap/dcache issues. */
#define MDBX_CPU_CACHE_MMAP_NONCOHERENT 0
#endif
#endif /* ndef MDBX_CPU_CACHE_MMAP_NONCOHERENT */
static __inline void mdbx_invalidate_mmap_noncoherent_cache(void *addr,
size_t nbytes) {
#if MDBX_CPU_CACHE_MMAP_NONCOHERENT
#ifdef DCACHE
/* MIPS has cache coherency issues. /* MIPS has cache coherency issues.
* Note: for any nbytes >= on-chip cache size, entire is flushed. */ * Note: for any nbytes >= on-chip cache size, entire is flushed. */
cacheflush(addr, nbytes, DCACHE); cacheflush(addr, nbytes, DCACHE);
#else #else
#error "Sorry, cacheflush() for MIPS not implemented" #error "Oops, cacheflush() not available"
#endif /* __mips__ */ #endif /* DCACHE */
#else #else /* MDBX_CPU_CACHE_MMAP_NONCOHERENT */
/* LY: assume no relevant mmap/dcache issues. */
(void)addr; (void)addr;
(void)nbytes; (void)nbytes;
#endif #endif /* MDBX_CPU_CACHE_MMAP_NONCOHERENT */
} }
/*----------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------*/